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 Features
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32-kHz Crystal Oscillator 1.1 V to 2.2 V Operating-voltage Range Integrated Capacitors for Digital Trimming Suitable for up to 12.5 pF Quartz Output Pulse Formers Mask Options for Motor Period and Pulse Width Low Resistance Output for Bipolar Stepping Motor Motor Fast-test Function
Description
The E1466D is an integrated circuit in CMOS Silicon Gate Technology for analog clocks. It consists of a 32-kHz oscillator, frequency divider, output pulse formers and push-pull motor drivers. Integrated capacitors are mask-selectable to accomodate the external quartz crystal. Additional capacitance can be selected through pad bonding for trimming the oscillator frequency.
32-kHz Clock CMOS IC with Digital Trimming E1466D
4731A-CLOCK-06/03
1
Pad Configuration
Figure 1. Pinning
C4 C3 C2 C1 VDD (1) OSCIN OSCOUT (1)
VSS
E1466D
TEST (2) MOT1 (2)
(1) The (2)
MOT2 MOT1
pads VDD and OSCOUT are interchangeable per mask option
The pads TEST and MOT1 are interchangeable per mask option
Pin Description
Name VDD VSS OSCIN OSCOUT MOT1/2 C1, C2, C3, C4 TEST Description Positive supply voltage Negative supply voltage Oscillator input Oscillator output Motor drive outputs Oscillator trimming inputs TEST input/output
2
E1466D
4731A-CLOCK-06/03
E1466D
Functional Descripion
Oscillator
An oscillator inverter with feedback resistor is provided to generate the 32768 Hz clock frequency. Values for the fixed capacitors at OSCIN and OSCOUT are mask-selectable (see note 3 of "Operating Characteristics"). Four capacitor pads, C1 to C4, enable the users to add integrated trimming capacitors to OSCIN, providing 15 tuning steps. A frequency variation of typically 4 ppm for each tuning step is obtained by bonding the capacitor pads to OSCIN. As none of these pads are bonded, the IC is in an untrimmed state. Figure 3 shows the trimming curve characteristic.
Note: For applications which utilize this integrated trimming feature, Atmel will determine optimum values for the integrated capacitors COSCIN and COSCOUT.
Trimming Capacitors
Capacitor pads C1 to C4: 0 = open, 1 = connected to OSCIN Combination C1 + C4 is redundant and therefore eliminated from the list Table 1. Frequency Trimming Table
Capacitor Pads C4 0 0 0 0 1 0 0 0 1 1 0 1 1 1 1 C3 0 0 0 1 0 0 1 1 0 1 1 0 1 1 1 C2 0 0 1 0 0 1 0 1 1 0 1 1 0 1 1 C1 0 1 0 0 0 1 1 0 0 0 1 1 1 0 1 Trimming Step 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Motor Drive Output
The E1466D contains two push-pull output buffers for driving bipolar stepping motors. During a motor pulse, the N-channel device of one buffer and the P-channel device of the other buffer will be activated. Both N-channel transistors are on and conducting between output pulses. The outputs are protected against inductive voltage spikes with diodes to both supply pins. The motor output period and pulse width are mask-programmable, as listed below: Available motor periods (TM): 125, 250, 500 ms and 2, 16 s Available max. pulse widths (tM): 15, 6, 23.4, 31.25, 46.9 ms and 1 s Available motor periods for motor test (TMT): 250, 500 ms and 1 s
Note: The following constraints for combination of motor period and pulse widths have to be considered: TM > 4 tM, TMT > 4 tM or alternatively TM = 2 tM, TMT = 2 tM
3
4731A-CLOCK-06/03
Test Functions
For test purposes, the TEST pad is open. With a high resistance probe (R 10 MW, C 20 pF), a test frequency fTEST of 128 Hz can be measured at the TEST pad. Connecting TEST (for at least 32 ms) to VDD changes the motor period from the selected value to TMT (mask-selectable) while the pulse width remains unaffected. This feature can be used for testing the mechanical parts of the clock.
Absolute Maximum Ratings
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and outputs on Atmel's circuits are protected against electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. The circuit is protected against supply voltage reversal for typically 5 minutes.
Parameters Supply voltage Input voltage range, all inputs Output short-circuit duration Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Lead temperature during soldering at 2 mm distance, 10 s Ptot Tamb Tstg Tsld Symbol VSS VIN Value -0.3 to 5 V (VSS - 0.3 V) VIN (VDD + 0.3 V) indefinite 125 -20 to +70 -40 to +125 260 mW C C C Unit V V
4
E1466D
4731A-CLOCK-06/03
E1466D
Operating Characteristics
VSS = 0 V, VDD = 1.5 V, Tamb = +25C, unless otherwise specified. All voltage levels are measured with reference to VSS. Test crystal as specified below.
Parameters Operating voltage Operating temperature Operating current Motor Drive Output Motor output current Motor period Motor period during motor test Motor pulse width Oscillator Startup voltage Frequency stability Integrated input capacitance Integrated output capacitance
(4)
Test Conditions
Symbol VDD Tamb
Min. 1.1 -20
Typ. 1.5 2
Max. 2.2 +70 5
Unit V C mA mA
R1 =
(2)
IDD IM TM TMT tM 4.3
VDD = 1.2 V, R1 = 200 W
See option list See option list See option list 1.2 1 See option list See option list 3 4 5 6 0.6 -0.6 23.4 3 -3 10 -10 31.2 pF pF pF pF A A ms 2.2 V ppm
Within 2 s DVDD = 100 mV, VDD = 1.1 to 2.2 V
(3)
VSTART Df/f COSCIN COSCOUT C1 C2 C3 C4 ITINH ITINL tTIN
Integrated capacitance for bond option
TEST Input Input current Input current Input debounce delay Notes: 1. 2. 3. 4. TEST = VDD peak current TEST = VSS peak current
Typical parameters represent the statistical mean values See test circuit Values can be selected in 1 pF steps. A total capacitance (COSCIN + COSCOUT) of 38 pF is available These values are valid for 10 pF quartz applications. For CL = 12.5 pF these values change to 4.5, 6, 7.5, 9 pF
Figure 2. Functional Test
VDD C4 C3 C2 C1 OSCIN VSS
OSCOUT
E1466D
TEST MOT2
R1
MOT1
MOT1
5
4731A-CLOCK-06/03
Test Crystal Specification
Oscillation frequency Series resistance Static capacitance Dynamic capacitance Load capacitance
fOSC = 32768 Hz RS = 30 kW C0 = 1.5 pF C1 = 3.0 fF CL optionally 10 or 12.5 pF
Figure 3. Motor Output Signal During Normal Operation and During Motor Test
Detail a TEST VDD VSS VDD VSS VDD VSS TM TMT
MOT1 tM MOT2
Detail a: 1/fTEST
Figure 4. Typical Trimming Curve Characteristic for TM of 2 s
2.00006 2.00005 2.00004 COX = 1.05 COX = 1.00 COX = 0.95
Motor Period (s)
2.00003 2.00002 2.00001 2.00000 1.99999 1.99998 1.99997 1.99996 1.99995 1.99994 1.99993 1.99992 1.99991 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Trimming Step
COX means frequency deviation due to production process variations. Trimming inputs C1 ... C4 are binary weighted, i.e., C1 ... C4 = 0 corresponds to trimming step 0 C1 ... C4 = 1 corresponds to trimming step 15 LSB = C1
6
E1466D
4731A-CLOCK-06/03
E1466D
Ordering Information
Table 2. Option List E1466Dx
Option Cycle (TM) s 2 2 0.25 2 Motor Pulse (tM) ms 46.9 46.9 62.5 1000 Test (TMT) ms 250 250 2000 500/ 250 COSCIN(1) pF 9 9 9 9 COSCOUT(1) pF 20 20 20 20 Integrated Capacitance C1 pF 3 3 3 3 C2 pF 4 4 4 4 C3 pF 5 5 5 5 C4 pF 6 6 6 6 pF 10 10 10 10 Load Capacitance
x A AO FO HO Note:
1. On-chip stray capacitance included
Option x A AO FO HO Pad 1 Pad 2 Pad 3 MOT2 MOT2 MOT2 MOT2 Pad 4 MOT1 MOT1 MOT1 MOT1 Pad 5 MOT1 MOT1 MOT1 MOT1 OSCIN OSCOUT OSCIN OSCOUT OSCIN OSCOUT OSCIN OSCOUT
Pad Designation Pad 6 TEST TEST TEST TEST Pad 7 VSS VSS VSS VSS Pad 8 VDD VDD VDD VDD Pad 8 C4 C4 C4 C4 Pad 10 C3 C3 C3 C3 Pad 11 C2 C2 C2 C2 Pad 12 C1 C1 C1 C1
7
4731A-CLOCK-06/03
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(c) Atmel Corporation 2003. All rights reserved. Atmel (R) and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others. Printed on recycled paper.
4731A-CLOCK-06/03 xM


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